opengl:vfpbenchlog
差分
このページの2つのバージョン間の差分を表示します。
両方とも前のリビジョン前のリビジョン次のリビジョン | 前のリビジョン次のリビジョン両方とも次のリビジョン | ||
opengl:vfpbenchlog [2019/06/16 01:04] – [Qualcomm Kryo 385 (Cortex-A75) (ARMv8.2A AArch64 arm64) FPU+ASIMD+HALFFP] oga | opengl:vfpbenchlog [2019/06/16 01:07] – [Qualcomm Kryo 280 (Cortex-A73) (ARMv8A AArch64 arm64) FPU+ASIMD] oga | ||
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行 9223: | 行 9223: | ||
- | ==== Qualcomm Kryo 385 (Cortex-A55) (ARMv8.2A AArch64 arm64) FPU+ASIMD+HALFFP ==== | ||
- | ++++Pixel 3 Snapdragon | + | ==== Qualcomm Kryo 280 (Cortex-A73 |
+ | |||
+ | |||
+ | ++++Essential Phone PH-1 Snapdragon | ||
< | < | ||
- | ARCH: ARMv8A | + | ARCH: ARMv8A |
- | FPU: AArch64 NEON | + | FPU : ASIMD(AArch64 NEON) |
- | SingleT SP max: 13.701 GFLOPS | + | Name: Qualcomm Technologies, |
- | SingleT DP max: 6.859 GFLOPS | + | |
- | MultiT | + | CPU Thread: 8 |
- | MultiT | + | CPU Core : |
- | CPU core: 4 | + | CPU Group : 2 |
- | FPHP : yes | + | Group 0: Thread= 4 Clock=1.900800 GHz (mask:f) |
- | SIMDHP: yes | + | Group 1: Thread= |
+ | NEON : yes | ||
+ | FMA : yes | ||
+ | FPHP : no | ||
+ | SIMDHP: no | ||
- | * FPU/NEON (single | + | Total: |
+ | SingleThread HP max: - | ||
+ | SingleThread SP max: | ||
+ | SingleThread DP max: | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | |||
+ | Group 0: Thread=4 | ||
+ | SingleThread HP max: - | ||
+ | SingleThread SP max: | ||
+ | SingleThread DP max: 7.406 GFLOPS | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | |||
+ | Group 1: Thread=4 | ||
+ | SingleThread HP max: - | ||
+ | SingleThread SP max: | ||
+ | SingleThread DP max: 9.772 GFLOPS | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | MultiThread | ||
+ | |||
+ | |||
+ | * Group 0: Thread=1 | ||
+ | * FPU/NEON (SP fp) | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (32bit x1) n8 : 0.396 | + | FPU fmul (32bit x1) n8 : 0.319 |
- | FPU fadd (32bit x1) n8 : 0.362 | + | FPU fadd (32bit x1) n8 : 0.334 |
- | FPU fmadd (32bit x1) n8 : | + | FPU fmadd (32bit x1) n8 : |
- | NEON fmul.2s (32bit x2) n8 : 0.378 | + | NEON fmul.2s (32bit x2) n8 : 0.334 |
- | NEON fadd.2s (32bit x2) n8 : 0.361 | + | NEON fadd.2s (32bit x2) n8 : 0.335 |
- | NEON fmla.2s (32bit x2) n8 : 0.378 12691.6 | + | NEON fmla.2s (32bit x2) n8 : 0.334 13676.0 |
- | NEON fmul.4s (32bit x4) n8 : 0.705 | + | NEON fmul.4s (32bit x4) n8 : 0.623 |
- | NEON fadd.4s (32bit x4) n8 : 0.705 | + | NEON fadd.4s (32bit x4) n8 : 0.628 |
- | NEON fmla.4s (32bit x4) n8 : 0.705 13619.2 | + | NEON fmla.4s (32bit x4) n8 : 0.622 14677.4 |
- | FPU fmul (32bit x1) ns4 : | + | FPU fmul (32bit x1) ns4 : |
- | FPU fadd (32bit x1) ns4 : | + | FPU fadd (32bit x1) ns4 : |
- | FPU fmadd (32bit x1) ns4 : 0.688 | + | FPU fmadd (32bit x1) ns4 : 0.685 |
- | NEON fmul.2s (32bit x2) ns4 : | + | NEON fmul.2s (32bit x2) ns4 : |
- | NEON fadd.2s (32bit x2) ns4 : | + | NEON fadd.2s (32bit x2) ns4 : |
- | NEON fmla.2s (32bit x2) ns4 : | + | NEON fmla.2s (32bit x2) ns4 : |
- | NEON fmul.4s (32bit x4) ns4 : | + | NEON fmul.4s (32bit x4) ns4 : |
- | NEON fadd.4s (32bit x4) ns4 : | + | NEON fadd.4s (32bit x4) ns4 : |
- | NEON fmla.4s (32bit x4) ns4 : | + | NEON fmla.4s (32bit x4) ns4 : |
- | FPU fmul (32bit x1) n1 : 0.688 | + | FPU fmul (32bit x1) n1 : 0.607 |
- | FPU fadd (32bit x1) n1 : 0.690 | + | FPU fadd (32bit x1) n1 : 0.606 |
- | FPU fmadd (32bit x1) n1 : | + | FPU fmadd (32bit x1) n1 : |
- | NEON fmul.2s (32bit x2) n1 : 0.688 | + | NEON fmul.2s (32bit x2) n1 : 0.606 |
- | NEON fadd.2s (32bit x2) n1 : 0.688 | + | NEON fadd.2s (32bit x2) n1 : 0.606 |
- | NEON fmla.2s (32bit x2) n1 : 2.754 | + | NEON fmla.2s (32bit x2) n1 : 2.424 |
- | NEON fmul.4s (32bit x4) n1 : 0.706 | + | NEON fmul.4s (32bit x4) n1 : 0.621 |
- | NEON fadd.4s (32bit x4) n1 : 0.706 | + | NEON fadd.4s (32bit x4) n1 : 0.623 |
- | NEON fmla.4s (32bit x4) n1 : 2.757 | + | NEON fmla.4s (32bit x4) n1 : 2.428 |
- | NEON fmul.4s (32bit x4) n12 : | + | NEON fmul.4s (32bit x4) n12 : |
- | NEON fadd.4s (32bit x4) n12 : | + | NEON fadd.4s (32bit x4) n12 : |
- | NEON fmla.4s (32bit x4) n12 : | + | NEON fmla.4s (32bit x4) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (double | + | * Group 0: Thread=1 |
+ | * FPU/NEON (DP fp) | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (64bit x1) n8 : 0.377 | + | FPU fmul (64bit x1) n8 : 0.336 |
- | FPU fadd (64bit x1) n8 : 0.381 | + | FPU fadd (64bit x1) n8 : 0.323 |
- | FPU fmadd (64bit x1) n8 : | + | FPU fmadd (64bit x1) n8 : |
- | NEON fmul.2d (64bit x2) n8 : 0.706 | + | NEON fmul.2d (64bit x2) n8 : 0.622 |
- | NEON fadd.2d (64bit x2) n8 : 0.706 | + | NEON fadd.2d (64bit x2) n8 : 0.626 |
- | NEON fmla.2d (64bit x2) n8 : 0.706 | + | NEON fmla.2d (64bit x2) n8 : 0.622 |
- | FPU fmul (64bit x1) ns4 : | + | FPU fmul (64bit x1) ns4 : |
- | FPU fadd (64bit x1) ns4 : | + | FPU fadd (64bit x1) ns4 : |
- | FPU fmadd (64bit x1) ns4 : 0.689 | + | FPU fmadd (64bit x1) ns4 : 0.608 |
- | NEON fmul.2d (64bit x2) ns4 : | + | NEON fmul.2d (64bit x2) ns4 : |
- | NEON fadd.2d (64bit x2) ns4 : | + | NEON fadd.2d (64bit x2) ns4 : |
- | NEON fmla.2d (64bit x2) ns4 : | + | NEON fmla.2d (64bit x2) ns4 : |
- | FPU fmul (64bit x1) n1 : 0.689 | + | FPU fmul (64bit x1) n1 : 0.606 |
- | FPU fadd (64bit x1) n1 : 0.689 | + | FPU fadd (64bit x1) n1 : 0.606 |
- | FPU fmadd (64bit x1) n1 : | + | FPU fmadd (64bit x1) n1 : |
- | NEON fmul.2d (64bit x2) n1 : 0.706 | + | NEON fmul.2d (64bit x2) n1 : 0.632 |
- | NEON fadd.2d (64bit x2) n1 : 0.709 | + | NEON fadd.2d (64bit x2) n1 : 0.620 |
- | NEON fmla.2d (64bit x2) n1 : 2.754 | + | NEON fmla.2d (64bit x2) n1 : 2.429 |
- | NEON fmul.2d (64bit x2) n12 : | + | NEON fmul.2d (64bit x2) n12 : |
- | NEON fadd.2d (64bit x2) n12 : | + | NEON fadd.2d (64bit x2) n12 : |
- | NEON fmla.2d (64bit x2) n12 : | + | NEON fmla.2d (64bit x2) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
+ | * Group 0: Thread=1 | ||
* Matrix 4x4 | * Matrix 4x4 | ||
TIME(s) | TIME(s) | ||
- | C++ code : 0.412 | + | C++ code : 0.426 |
- | NEON fmla.4s 128bit A : | + | NEON fmla.4s 128bit A : |
- | NEON fmla.4s 128bit B : | + | NEON fmla.4s 128bit B : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (single | + | * Group 0: Thread=4 |
+ | * FPU/NEON (SP fp) multi-thread | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (32bit x1) n8 : 0.393 12208.3 | + | FPU fmul (32bit x1) n8 : 0.318 14335.7 |
- | FPU fadd (32bit x1) n8 : 0.363 13232.9 | + | FPU fadd (32bit x1) n8 : 0.333 13704.3 |
- | FPU fmadd (32bit x1) n8 : | + | FPU fmadd (32bit x1) n8 : |
- | NEON fmul.2s (32bit x2) n8 : 0.383 25035.2 | + | NEON fmul.2s (32bit x2) n8 : 0.333 27405.8 |
- | NEON fadd.2s (32bit x2) n8 : 0.362 26526.6 | + | NEON fadd.2s (32bit x2) n8 : 0.334 27323.1 |
- | NEON fmla.2s (32bit x2) n8 : 0.384 50053.8 | + | NEON fmla.2s (32bit x2) n8 : 0.339 53820.0 |
- | NEON fmul.4s (32bit x4) n8 : 0.705 27222.9 | + | NEON fmul.4s (32bit x4) n8 : 0.622 29351.1 |
- | NEON fadd.4s (32bit x4) n8 : 0.720 26648.3 | + | NEON fadd.4s (32bit x4) n8 : 0.622 29337.7 |
- | NEON fmla.4s (32bit x4) n8 : 0.708 54231.1 1694.7 ( 32 1.0) 54231.1 | + | NEON fmla.4s (32bit x4) n8 : 0.621 58795.1 1837.3 ( 32 1.0) 58795.1 |
- | FPU fmul (32bit x1) ns4 : | + | FPU fmul (32bit x1) ns4 : |
- | FPU fadd (32bit x1) ns4 : | + | FPU fadd (32bit x1) ns4 : |
- | FPU fmadd (32bit x1) ns4 : 0.688 13949.1 | + | FPU fmadd (32bit x1) ns4 : 0.681 13398.8 |
- | NEON fmul.2s (32bit x2) ns4 : | + | NEON fmul.2s (32bit x2) ns4 : |
- | NEON fadd.2s (32bit x2) ns4 : | + | NEON fadd.2s (32bit x2) ns4 : |
- | NEON fmla.2s (32bit x2) ns4 : | + | NEON fmla.2s (32bit x2) ns4 : |
- | NEON fmul.4s (32bit x4) ns4 : | + | NEON fmul.4s (32bit x4) ns4 : |
- | NEON fadd.4s (32bit x4) ns4 : | + | NEON fadd.4s (32bit x4) ns4 : |
- | NEON fmla.4s (32bit x4) ns4 : | + | NEON fmla.4s (32bit x4) ns4 : |
- | FPU fmul (32bit x1) n1 : 0.688 | + | FPU fmul (32bit x1) n1 : 0.608 |
- | FPU fadd (32bit x1) n1 : 0.688 | + | FPU fadd (32bit x1) n1 : 0.606 |
- | FPU fmadd (32bit x1) n1 : | + | FPU fmadd (32bit x1) n1 : |
- | NEON fmul.2s (32bit x2) n1 : 0.689 13937.2 | + | NEON fmul.2s (32bit x2) n1 : 0.616 14812.3 |
- | NEON fadd.2s (32bit x2) n1 : 0.688 13955.2 | + | NEON fadd.2s (32bit x2) n1 : 0.605 15074.0 |
- | NEON fmla.2s (32bit x2) n1 : 2.750 | + | NEON fmla.2s (32bit x2) n1 : 2.433 |
- | NEON fmul.4s (32bit x4) n1 : 0.704 27255.8 | + | NEON fmul.4s (32bit x4) n1 : 0.630 28977.6 |
- | NEON fadd.4s (32bit x4) n1 : 0.706 27191.7 | + | NEON fadd.4s (32bit x4) n1 : 0.622 29345.1 |
- | NEON fmla.4s (32bit x4) n1 : 2.764 13891.8 434.1 ( 32 0.2) 13891.8 | + | NEON fmla.4s (32bit x4) n1 : 2.434 14996.4 468.6 ( 32 0.2) 14996.4 |
- | NEON fmul.4s (32bit x4) n12 : | + | NEON fmul.4s (32bit x4) n12 : |
- | NEON fadd.4s (32bit x4) n12 : | + | NEON fadd.4s (32bit x4) n12 : |
- | NEON fmla.4s (32bit x4) n12 : | + | NEON fmla.4s (32bit x4) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (double | + | * Group 0: Thread=4 |
+ | * FPU/NEON (DP fp) multi-thread | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (64bit x1) n8 : 0.377 12737.2 | + | FPU fmul (64bit x1) n8 : 0.336 13593.7 |
- | FPU fadd (64bit x1) n8 : 0.379 12652.6 | + | FPU fadd (64bit x1) n8 : 0.323 14139.0 |
- | FPU fmadd (64bit x1) n8 : | + | FPU fmadd (64bit x1) n8 : |
- | NEON fmul.2d (64bit x2) n8 : 0.707 13571.8 | + | NEON fmul.2d (64bit x2) n8 : 0.621 14688.0 |
- | NEON fadd.2d (64bit x2) n8 : 0.707 13570.5 | + | NEON fadd.2d (64bit x2) n8 : 0.621 14690.9 |
- | NEON fmla.2d (64bit x2) n8 : 0.709 27085.1 | + | NEON fmla.2d (64bit x2) n8 : 0.621 29407.3 |
- | FPU fmul (64bit x1) ns4 : | + | FPU fmul (64bit x1) ns4 : |
- | FPU fadd (64bit x1) ns4 : | + | FPU fadd (64bit x1) ns4 : |
- | FPU fmadd (64bit x1) ns4 : 0.691 13893.6 | + | FPU fmadd (64bit x1) ns4 : 0.606 15057.1 |
- | NEON fmul.2d (64bit x2) ns4 : | + | NEON fmul.2d (64bit x2) ns4 : |
- | NEON fadd.2d (64bit x2) ns4 : | + | NEON fadd.2d (64bit x2) ns4 : |
- | NEON fmla.2d (64bit x2) ns4 : | + | NEON fmla.2d (64bit x2) ns4 : |
- | FPU fmul (64bit x1) n1 : 0.695 | + | FPU fmul (64bit x1) n1 : 0.605 |
- | FPU fadd (64bit x1) n1 : 0.687 | + | FPU fadd (64bit x1) n1 : 0.605 |
- | FPU fmadd (64bit x1) n1 : | + | FPU fmadd (64bit x1) n1 : |
- | NEON fmul.2d (64bit x2) n1 : 0.706 13591.6 | + | NEON fmul.2d (64bit x2) n1 : 0.621 14702.7 |
- | NEON fadd.2d (64bit x2) n1 : 0.710 13522.7 | + | NEON fadd.2d (64bit x2) n1 : 0.621 14698.1 |
- | NEON fmla.2d (64bit x2) n1 : 2.752 | + | NEON fmla.2d (64bit x2) n1 : 2.424 |
- | NEON fmul.2d (64bit x2) n12 : | + | NEON fmul.2d (64bit x2) n12 : |
- | NEON fadd.2d (64bit x2) n12 : | + | NEON fadd.2d (64bit x2) n12 : |
- | NEON fmla.2d (64bit x2) n12 : | + | NEON fmla.2d (64bit x2) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
+ | * Group 0: Thread=4 | ||
* Matrix 4x4 multi-thread | * Matrix 4x4 multi-thread | ||
TIME(s) | TIME(s) | ||
- | C++ code : 0.421 17033.9 | + | C++ code : 0.436 15639.0 |
- | NEON fmla.4s 128bit A : | + | NEON fmla.4s 128bit A : |
- | NEON fmla.4s 128bit B : | + | NEON fmla.4s 128bit B : |
- | Average | + | Average |
- | Highest | + | Highest |
- | cpu0 1766400 300000 | + | * Group 1: |
- | cpu1 1766400 300000 | + | * FPU/NEON (SP fp) |
- | cpu2 1766400 300000 | + | |
- | cpu3 1766400 300000 | + | |
- | cpu4 2803200 825600 | + | |
- | cpu5 2803200 825600 | + | |
- | cpu6 2803200 825600 | + | |
- | cpu7 2803200 825600 | + | |
- | + | ||
- | Processor : AArch64 Processor rev 13 (aarch64) | + | |
- | processor : 0 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x7 | + | |
- | CPU part : 0x803 | + | |
- | CPU revision : 12 | + | |
- | + | ||
- | processor : | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x7 | + | |
- | CPU part : 0x803 | + | |
- | CPU revision : 12 | + | |
- | + | ||
- | processor : 2 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x7 | + | |
- | CPU part : 0x803 | + | |
- | CPU revision : 12 | + | |
- | + | ||
- | processor : 3 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x7 | + | |
- | CPU part : 0x803 | + | |
- | CPU revision : 12 | + | |
- | + | ||
- | processor : 4 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x6 | + | |
- | CPU part : 0x802 | + | |
- | CPU revision : 13 | + | |
- | + | ||
- | processor : 5 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x6 | + | |
- | CPU part : 0x802 | + | |
- | CPU revision : 13 | + | |
- | + | ||
- | processor : 6 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x6 | + | |
- | CPU part : 0x802 | + | |
- | CPU revision : 13 | + | |
- | + | ||
- | processor : 7 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0x6 | + | |
- | CPU part : 0x802 | + | |
- | CPU revision : 13 | + | |
- | + | ||
- | Hardware : Qualcomm Technologies, | + | |
- | + | ||
- | Qualcomm Technologies, | + | |
- | + | ||
- | 2019/01/05 13:41:12 | + | |
- | </ | + | |
- | + | ||
- | ++++ | + | |
- | + | ||
- | + | ||
- | + | ||
- | ==== Qualcomm Kryo 280 (Cortex-A73) (ARMv8A AArch64 arm64) FPU+ASIMD ==== | + | |
- | + | ||
- | + | ||
- | ++++Essential Phone PH-1 Snapdragon 835 big core Kryo 280 2.32GHz x4 ARM64 (AArch64) Android 9.0| | + | |
- | + | ||
- | < | + | |
- | ARCH: ARMv8A 3 | + | |
- | FPU: AArch64 NEON | + | |
- | SingleT SP max: 19.546 GFLOPS | + | |
- | SingleT DP max: 9.769 GFLOPS | + | |
- | MultiT | + | |
- | MultiT | + | |
- | CPU core: 4 | + | |
- | FPHP : no | + | |
- | SIMDHP: no | + | |
- | + | ||
- | * FPU/NEON (single | + | |
TIME(s) | TIME(s) | ||
- | FPU fmul (32bit x1) n8 : 0.288 | + | FPU fmul (32bit x1) n8 : 0.317 |
- | FPU fadd (32bit x1) n8 : 0.258 | + | FPU fadd (32bit x1) n8 : 0.317 |
- | FPU fmadd (32bit x1) n8 : | + | FPU fmadd (32bit x1) n8 : |
- | NEON fmul.2s (32bit x2) n8 : 0.258 | + | NEON fmul.2s (32bit x2) n8 : 0.317 |
- | NEON fadd.2s (32bit x2) n8 : 0.258 | + | NEON fadd.2s (32bit x2) n8 : 0.317 |
- | NEON fmla.2s (32bit x2) n8 : 0.269 17816.9 | + | NEON fmla.2s (32bit x2) n8 : 0.329 17927.5 |
- | NEON fmul.4s (32bit x4) n8 : 0.491 | + | NEON fmul.4s (32bit x4) n8 : 0.603 |
- | NEON fadd.4s (32bit x4) n8 : 0.491 | + | NEON fadd.4s (32bit x4) n8 : 0.603 |
- | NEON fmla.4s (32bit x4) n8 : 0.491 | + | NEON fmla.4s (32bit x4) n8 : 0.603 |
- | FPU fmul (32bit x1) ns4 : | + | FPU fmul (32bit x1) ns4 : |
- | FPU fadd (32bit x1) ns4 : | + | FPU fadd (32bit x1) ns4 : |
- | FPU fmadd (32bit x1) ns4 : 0.614 | + | FPU fmadd (32bit x1) ns4 : 0.755 |
- | NEON fmul.2s (32bit x2) ns4 : | + | NEON fmul.2s (32bit x2) ns4 : |
- | NEON fadd.2s (32bit x2) ns4 : | + | NEON fadd.2s (32bit x2) ns4 : |
- | NEON fmla.2s (32bit x2) ns4 : | + | NEON fmla.2s (32bit x2) ns4 : |
- | NEON fmul.4s (32bit x4) ns4 : | + | NEON fmul.4s (32bit x4) ns4 : |
- | NEON fadd.4s (32bit x4) ns4 : | + | NEON fadd.4s (32bit x4) ns4 : |
- | NEON fmla.4s (32bit x4) ns4 : | + | NEON fmla.4s (32bit x4) ns4 : |
- | FPU fmul (32bit x1) n1 : 0.258 | + | FPU fmul (32bit x1) n1 : 0.317 |
- | FPU fadd (32bit x1) n1 : 0.258 | + | FPU fadd (32bit x1) n1 : 0.317 |
- | FPU fmadd (32bit x1) n1 : | + | FPU fmadd (32bit x1) n1 : |
- | NEON fmul.2s (32bit x2) n1 : 0.258 | + | NEON fmul.2s (32bit x2) n1 : 0.317 |
- | NEON fadd.2s (32bit x2) n1 : 0.258 | + | NEON fadd.2s (32bit x2) n1 : 0.317 |
- | NEON fmla.2s (32bit x2) n1 : 1.474 | + | NEON fmla.2s (32bit x2) n1 : 1.810 |
- | NEON fmul.4s (32bit x4) n1 : 0.491 | + | NEON fmul.4s (32bit x4) n1 : 0.604 |
- | NEON fadd.4s (32bit x4) n1 : 0.491 | + | NEON fadd.4s (32bit x4) n1 : 0.603 |
- | NEON fmla.4s (32bit x4) n1 : 1.474 6513.1 814.1 ( 8 0.3) 6513.1 | + | NEON fmla.4s (32bit x4) n1 : 1.811 6513.9 814.2 ( 8 0.3) 6513.9 |
- | NEON fmul.4s (32bit x4) n12 : | + | NEON fmul.4s (32bit x4) n12 : |
- | NEON fadd.4s (32bit x4) n12 : | + | NEON fadd.4s (32bit x4) n12 : |
- | NEON fmla.4s (32bit x4) n12 : | + | NEON fmla.4s (32bit x4) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (double | + | * Group 1: Thread=1 |
+ | * FPU/NEON (DP fp) | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (64bit x1) n8 : 0.280 | + | FPU fmul (64bit x1) n8 : 0.317 |
- | FPU fadd (64bit x1) n8 : 0.258 | + | FPU fadd (64bit x1) n8 : 0.317 |
- | FPU fmadd (64bit x1) n8 : | + | FPU fmadd (64bit x1) n8 : |
- | NEON fmul.2d (64bit x2) n8 : 0.491 | + | NEON fmul.2d (64bit x2) n8 : 0.604 |
- | NEON fadd.2d (64bit x2) n8 : 0.491 4885.3 | + | NEON fadd.2d (64bit x2) n8 : 0.604 4885.3 |
- | NEON fmla.2d (64bit x2) n8 : 0.492 | + | NEON fmla.2d (64bit x2) n8 : 0.604 |
- | FPU fmul (64bit x1) ns4 : | + | FPU fmul (64bit x1) ns4 : |
- | FPU fadd (64bit x1) ns4 : | + | FPU fadd (64bit x1) ns4 : |
- | FPU fmadd (64bit x1) ns4 : 0.431 | + | FPU fmadd (64bit x1) ns4 : 0.528 |
- | NEON fmul.2d (64bit x2) ns4 : | + | NEON fmul.2d (64bit x2) ns4 : |
- | NEON fadd.2d (64bit x2) ns4 : | + | NEON fadd.2d (64bit x2) ns4 : |
- | NEON fmla.2d (64bit x2) ns4 : | + | NEON fmla.2d (64bit x2) ns4 : |
- | FPU fmul (64bit x1) n1 : 0.258 | + | FPU fmul (64bit x1) n1 : 0.317 |
- | FPU fadd (64bit x1) n1 : 0.258 | + | FPU fadd (64bit x1) n1 : 0.317 |
- | FPU fmadd (64bit x1) n1 : | + | FPU fmadd (64bit x1) n1 : |
- | NEON fmul.2d (64bit x2) n1 : 0.492 | + | NEON fmul.2d (64bit x2) n1 : 0.604 |
- | NEON fadd.2d (64bit x2) n1 : 0.491 | + | NEON fadd.2d (64bit x2) n1 : 0.604 |
- | NEON fmla.2d (64bit x2) n1 : 1.475 | + | NEON fmla.2d (64bit x2) n1 : 1.811 |
- | NEON fmul.2d (64bit x2) n12 : | + | NEON fmul.2d (64bit x2) n12 : |
- | NEON fadd.2d (64bit x2) n12 : | + | NEON fadd.2d (64bit x2) n12 : |
- | NEON fmla.2d (64bit x2) n12 : | + | NEON fmla.2d (64bit x2) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
+ | * Group 1: Thread=1 | ||
* Matrix 4x4 | * Matrix 4x4 | ||
TIME(s) | TIME(s) | ||
- | C++ code : 0.267 | + | C++ code : 0.360 |
- | NEON fmla.4s 128bit A : | + | NEON fmla.4s 128bit A : |
- | NEON fmla.4s 128bit B : | + | NEON fmla.4s 128bit B : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (single | + | * Group 1: Thread=4 |
+ | * FPU/NEON (SP fp) multi-thread | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (32bit x1) n8 : 0.560 8571.6 | + | FPU fmul (32bit x1) n8 : 0.455 12977.3 |
- | FPU fadd (32bit x1) n8 : 0.538 8917.4 | + | FPU fadd (32bit x1) n8 : 0.494 11946.6 |
- | FPU fmadd (32bit x1) n8 : | + | FPU fmadd (32bit x1) n8 : |
- | NEON fmul.2s (32bit x2) n8 : 0.536 17918.8 | + | NEON fmul.2s (32bit x2) n8 : 0.479 24612.2 |
- | NEON fadd.2s (32bit x2) n8 : 0.538 17834.8 2229.4 ( 8 0.9) 17834.8 | + | NEON fadd.2s (32bit x2) n8 : 0.476 24783.8 3098.0 ( 8 1.3) 24783.8 |
- | NEON fmla.2s (32bit x2) n8 : 0.564 34051.0 | + | NEON fmla.2s (32bit x2) n8 : 0.479 49204.8 |
- | NEON fmul.4s (32bit x4) n8 : | + | NEON fmul.4s (32bit x4) n8 : |
- | NEON fadd.4s (32bit x4) n8 : | + | NEON fadd.4s (32bit x4) n8 : |
- | NEON fmla.4s (32bit x4) n8 : | + | NEON fmla.4s (32bit x4) n8 : |
- | FPU fmul (32bit x1) ns4 : | + | FPU fmul (32bit x1) ns4 : |
- | FPU fadd (32bit x1) ns4 : | + | FPU fadd (32bit x1) ns4 : |
- | FPU fmadd (32bit x1) ns4 : 1.277 | + | FPU fmadd (32bit x1) ns4 : 1.134 10401.5 |
- | NEON fmul.2s (32bit x2) ns4 : | + | NEON fmul.2s (32bit x2) ns4 : |
- | NEON fadd.2s (32bit x2) ns4 : | + | NEON fadd.2s (32bit x2) ns4 : |
- | NEON fmla.2s (32bit x2) ns4 : | + | NEON fmla.2s (32bit x2) ns4 : |
- | NEON fmul.4s (32bit x4) ns4 : | + | NEON fmul.4s (32bit x4) ns4 : |
- | NEON fadd.4s (32bit x4) ns4 : | + | NEON fadd.4s (32bit x4) ns4 : |
- | NEON fmla.4s (32bit x4) ns4 : | + | NEON fmla.4s (32bit x4) ns4 : |
- | FPU fmul (32bit x1) n1 : 0.268 17912.2 | + | FPU fmul (32bit x1) n1 : 0.403 14651.9 |
- | FPU fadd (32bit x1) n1 : 0.268 17911.6 4477.9 ( 4 1.8) 17911.6 | + | FPU fadd (32bit x1) n1 : 0.434 13582.6 3395.6 ( 4 1.4) 13582.6 |
- | FPU fmadd (32bit x1) n1 : | + | FPU fmadd (32bit x1) n1 : |
- | NEON fmul.2s (32bit x2) n1 : 0.268 35833.5 | + | NEON fmul.2s (32bit x2) n1 : 0.412 28620.6 |
- | NEON fadd.2s (32bit x2) n1 : 0.268 35834.0 | + | NEON fadd.2s (32bit x2) n1 : 0.384 30747.3 |
- | NEON fmla.2s (32bit x2) n1 : | + | NEON fmla.2s (32bit x2) n1 : |
- | NEON fmul.4s (32bit x4) n1 : 0.510 37624.7 | + | NEON fmul.4s (32bit x4) n1 : 0.684 34490.5 |
- | NEON fadd.4s (32bit x4) n1 : 0.510 37627.6 | + | NEON fadd.4s (32bit x4) n1 : 0.636 37116.4 |
- | NEON fmla.4s (32bit x4) n1 : 1.531 25083.1 783.8 ( 32 0.3) 25083.1 | + | NEON fmla.4s (32bit x4) n1 : 1.902 24810.3 775.3 ( 32 0.3) 24810.3 |
- | NEON fmul.4s (32bit x4) n12 : | + | NEON fmul.4s (32bit x4) n12 : |
- | NEON fadd.4s (32bit x4) n12 : | + | NEON fadd.4s (32bit x4) n12 : |
- | NEON fmla.4s (32bit x4) n12 : | + | NEON fmla.4s (32bit x4) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
- | * FPU/NEON (double | + | * Group 1: Thread=4 |
+ | * FPU/NEON (DP fp) multi-thread | ||
TIME(s) | TIME(s) | ||
- | FPU fmul (64bit x1) n8 : | + | FPU fmul (64bit x1) n8 : |
- | FPU fadd (64bit x1) n8 : | + | FPU fadd (64bit x1) n8 : |
- | FPU fmadd (64bit x1) n8 : | + | FPU fmadd (64bit x1) n8 : |
- | NEON fmul.2d (64bit x2) n8 : | + | NEON fmul.2d (64bit x2) n8 : |
- | NEON fadd.2d (64bit x2) n8 : | + | NEON fadd.2d (64bit x2) n8 : |
- | NEON fmla.2d (64bit x2) n8 : | + | NEON fmla.2d (64bit x2) n8 : |
- | FPU fmul (64bit x1) ns4 : | + | FPU fmul (64bit x1) ns4 : |
- | FPU fadd (64bit x1) ns4 : | + | FPU fadd (64bit x1) ns4 : |
- | FPU fmadd (64bit x1) ns4 : | + | FPU fmadd (64bit x1) ns4 : |
- | NEON fmul.2d (64bit x2) ns4 : | + | NEON fmul.2d (64bit x2) ns4 : |
- | NEON fadd.2d (64bit x2) ns4 : | + | NEON fadd.2d (64bit x2) ns4 : |
- | NEON fmla.2d (64bit x2) ns4 : | + | NEON fmla.2d (64bit x2) ns4 : |
- | FPU fmul (64bit x1) n1 : | + | FPU fmul (64bit x1) n1 : |
- | FPU fadd (64bit x1) n1 : | + | FPU fadd (64bit x1) n1 : |
- | FPU fmadd (64bit x1) n1 : | + | FPU fmadd (64bit x1) n1 : |
- | NEON fmul.2d (64bit x2) n1 : 0.510 18812.5 2351.6 ( 8 1.0) 18812.5 | + | NEON fmul.2d (64bit x2) n1 : 0.821 14364.5 1795.6 ( 8 0.7) 14364.5 |
- | NEON fadd.2d (64bit x2) n1 : 0.510 18812.1 | + | NEON fadd.2d (64bit x2) n1 : 0.937 12586.2 |
- | NEON fmla.2d (64bit x2) n1 : | + | NEON fmla.2d (64bit x2) n1 : |
- | NEON fmul.2d (64bit x2) n12 : | + | NEON fmul.2d (64bit x2) n12 : |
- | NEON fadd.2d (64bit x2) n12 : | + | NEON fadd.2d (64bit x2) n12 : |
- | NEON fmla.2d (64bit x2) n12 : | + | NEON fmla.2d (64bit x2) n12 : |
- | Average | + | Average |
- | Highest | + | Highest |
+ | * Group 1: Thread=4 | ||
* Matrix 4x4 multi-thread | * Matrix 4x4 multi-thread | ||
TIME(s) | TIME(s) | ||
- | C++ code : 0.569 12591.7 | + | C++ code : 0.540 16309.5 |
- | NEON fmla.4s 128bit A : | + | NEON fmla.4s 128bit A : |
- | NEON fmla.4s 128bit B : | + | NEON fmla.4s 128bit B : |
- | Average | + | Average |
- | Highest | + | Highest |
- | + | ||
- | + | ||
- | cpu0 1900800 300000 | + | |
- | cpu1 1900800 300000 | + | |
- | cpu2 1900800 300000 | + | |
- | cpu3 1900800 300000 | + | |
- | cpu4 2457600 300000 | + | |
- | cpu5 2457600 300000 | + | |
- | cpu6 2457600 300000 | + | |
- | cpu7 2457600 300000 | + | |
- | + | ||
- | Processor : AArch64 Processor rev 1 (aarch64) | + | |
- | processor : 0 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x801 | + | |
- | CPU revision : 4 | + | |
- | + | ||
- | processor : 1 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x801 | + | |
- | CPU revision : 4 | + | |
- | + | ||
- | processor : 2 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x801 | + | |
- | CPU revision : 4 | + | |
- | + | ||
- | processor : 3 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x801 | + | |
- | CPU revision : 4 | + | |
- | + | ||
- | processor : 4 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x800 | + | |
- | CPU revision : 1 | + | |
- | + | ||
- | processor : 5 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x800 | + | |
- | CPU revision : 1 | + | |
- | + | ||
- | processor : 6 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x800 | + | |
- | CPU revision : 1 | + | |
- | + | ||
- | processor : 7 | + | |
- | BogoMIPS : 38.00 | + | |
- | Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 | + | |
- | CPU implementer : | + | |
- | CPU architecture: | + | |
- | CPU variant : 0xa | + | |
- | CPU part : 0x800 | + | |
- | CPU revision : 1 | + | |
- | + | ||
- | Hardware : Qualcomm Technologies, | + | |
- | Qualcomm Technologies, | ||
- | 2019/01/19 16: | ||
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opengl/vfpbenchlog.txt · 最終更新: 2020/12/30 23:46 by oga