| 両方とも前のリビジョン前のリビジョン次のリビジョン | 前のリビジョン |
| opengl:fpu_vfp [2019/01/03 13:44] – [ARM VFP の機能ビット詳細] oga | opengl:fpu_vfp [2019/01/03 15:54] (現在) – [ARM VFP の機能ビット詳細] oga |
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| ^ ^ ^ MVFR0 ^^^^^^^^ MVFR1 ^^^^^^^^ MVFR2 ^^ | |
| ^ ^ ^ ^ VFP ^^ ^ ^ ^ ^ ^ ^ ^ NEON ^^^^ VFP ^ ^ SIMD ^ FP ^ | ^ ^ ^ MVFR0 ^^^^^^^^ MVFR1 ^^^^^^^^ MVFR2 ^^ AA64PFR0 ^^ |
| ^ ^ ^ D32 ^ VSP ^ VDP ^ TE ^ DIV ^ SQR ^ SV ^ RM ^ FZ ^ NaN ^ NLS ^ NI ^ NSP ^ NHP ^ VHP ^ FMA ^ MISC ^ MISC ^ | ^ ^ ^ ^ VFP ^^ ^ ^ ^ ^ ^ ^ ^ NEON ^^^^ VFP ^ ^ SIMD ^ FP ^ VFP ^ SIMD ^ |
| | ARM1176JZF-S | vfpv2 | - | Y | Y | Y | Y | Y | Y | | | | | | | | | | | | | ^ ^ ^ D32 ^ VSP ^ VDP ^ TE ^ DIV ^ SQR ^ SV ^ RM ^ FZ ^ NaN ^ NLS ^ NI ^ NSP ^ NHP ^ VHP ^ FMA ^ MISC ^ MISC ^ FP ^ ASMD ^ |
| | Cortex-A8 | vfpv3+NEON | 2 | 2 | 2 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | - | - | - | | | | | ARM1176JZF-S | vfpv2 | - | Y | Y | Y | Y | Y | Y | | | | | | | | | | | | | | |
| | Cortex-A9 | vfpv3-D16 | - | Y | Y | - | Y | Y | Y | Y | Y | Y | - | - | - | - | Y | - | | | | | Cortex-A8 | vfpv3+NEON | 2 | 2 | 2 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | - | - | - | | | | | |
| | Cortex-A9 | vfpv3+NEON | Y | Y | Y | - | Y | Y | - | Y | Y | Y | Y | Y | Y | Y | Y | - | | | | | Cortex-A9 | vfpv3-D16 | - | Y | Y | - | Y | Y | Y | Y | Y | Y | - | - | - | - | Y | - | | | | | |
| | Cortex-A5 | vfpv4-D16 | - | Y | Y | - | Y | Y | - | Y | Y | Y | - | - | - | - | Y | Y | | | | | Cortex-A9 | vfpv3+NEON | Y | Y | Y | - | Y | Y | - | Y | Y | Y | Y | Y | Y | Y | Y | - | | | | | |
| | Cortex-A5 | vfpv4+NEON | Y | Y | Y | - | Y | Y | - | Y | Y | Y | Y | Y | Y | Y | Y | Y | | | | | Cortex-A5 | vfpv4-D16 | - | Y | Y | - | Y | Y | - | Y | Y | Y | - | - | - | - | Y | Y | | | | | |
| | Cortex-A15 | vfpv4+NEON | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | | | | | Cortex-A5 | vfpv4+NEON | Y | Y | Y | - | Y | Y | - | Y | Y | Y | Y | Y | Y | Y | Y | Y | | | | | |
| | Cortex-A7 | vfpv4+NEON | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | | | | | Cortex-A15 | vfpv4+NEON | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | | | | | |
| | Cortex-A53 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | | | Cortex-A7 | vfpv4+NEON | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | | | | | |
| | Cortex-A57 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | | | Cortex-A17 | vfpv4+NEON | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | | | | | |
| | Cortex-A72 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | | | | | Cortex-A53 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | 0 | 0 | |
| | | Cortex-A57 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | 0 | 0 | |
| | | Cortex-A72 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | 0 | 0 | |
| | | Cortex-A35 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | 0 | 0 | |
| | | Cortex-A73 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 1 | 3 | 4 | F/0 | F/0 | |
| | | Cortex-A55 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 3 | 1 | 3 | 4 | F/1 | F/1 | |
| | | Cortex-A75 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 3 | 1 | 3 | 4 | 1 | 1 | |
| | | Cortex-A76 | AA64 ASIMD | 2 | 2 | 2 | - | 1 | 1 | - | 1 | 1 | 1 | 1 | 1 | 1 | 2 | 3 | 1 | 3 | 4 | 1 | 1 | |
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| ^ MVFR0 ^^ Bit ^ ^ | ^ MVFR0 ^^ Bit ^ ^ |
| | D32 | SIMDReg | 0- 3 | D16 / D32 | | | D32 | SIMDReg | 0- 3 | D16 / D32 | |
| | VSP | FPSP | 4- 7 | VFP Single precision | | | VSP | FPSP | 4- 7 | VFP Single precision | |
| | VDP | FPDP | 8-11 | VFP double precision | | VDP | FPDP | 8-11 | VFP double precision |
| | TE | FPTrap | 12-15 | Trap | | | TE | FPTrap | 12-15 | Trap | |
| | DIV | FPDivide | 16-19 | VFP hw divide | | | DIV | FPDivide | 16-19 | VFP hw divide | |
| | SQR | FPSqrt | 20-23 | VFP hw square root | | | SQR | FPSqrt | 20-23 | VFP hw square root | |
| | SV | FPShVec | 24-27 | VFP short vector | | | SV | FPShVec | 24-27 | VFP short vector | |
| | RM | FPRound | 28-31 | VFP all rounding mode supported | | | RM | FPRound | 28-31 | VFP all rounding mode supported | |
| ^ MVFR1 ^^ Bit ^ ^ | ^ MVFR1 ^^ Bit ^ ^ |
| | FZ | FPFtZ | 0- 3 | VFP Full denormal arithmetic | | | FZ | FPFtZ | 0- 3 | VFP Full denormal arithmetic | |
| | Nan | FPDNaN | 4- 7 | VFP Propagation of NaN values | | | Nan | FPDNaN | 4- 7 | VFP Propagation of NaN values | |
| | NLS | SIMDLS | 8-11 | NEON Load/store instructions | | | NLS | SIMDLS | 8-11 | NEON Load/store instructions | |
| | NI | SIMDInt | 12-15 | NEON Integier instructions | | | NI | SIMDInt | 12-15 | NEON Integier instructions | |
| | NSP | SIMDSP | 16-19 | NEON single precision operations | | | NSP | SIMDSP | 16-19 | NEON single precision operations | |
| | NHP | SIMDHP | 20-23 | NEON half-precision operations | | | NHP | SIMDHP | 20-23 | NEON half-precision operations | |
| | VHP | FPHP | 24-27 | VFP half-precision operations | | | VHP | FPHP | 24-27 | VFP half-precision operations | |
| | FMA | SIMDFMAC | 28-31 | Fused Multiply Add | | | FMA | SIMDFMAC | 28-31 | Fused Multiply Add | |
| | ^ MVFR2 ^^ Bit ^ ^ |
| | | MISC | SIMDMisc | 0-3 | | |
| | | MISC | FPMisc | 4-7 | | |
| | ^ ID_AA64PFR0 ^^ Bit ^ ^ |
| | | EL0 | EL0 | 0-3 | | |
| | | EL1 | EL1 | 4-7 | | |
| | | EL2 | EL2 | 8-11 | | |
| | | EL3 | EL3 | 12-15 | | |
| | | FP | FP | 16-19 | Floating-point, 15=not implemented, 0=implemented, 1=+half | |
| | | ASMD | AdvSIMD | 20-23 | Advanced SIMD 15=not implemented, 0=implemented, 1=+half | |
| | | GIC | GIC | 24-27 | | |
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| * A15 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438c/CDEFCBDC.html | * A15 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438c/CDEFCBDC.html |
| * A7 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438c/CDEFCBDC.html | * A7 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438c/CDEFCBDC.html |
| | * A17 VRP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0462f/CHDJHDHB.html |
| * A53 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0462f/CHDJHDHB.html | * A53 VFP NEON http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0462f/CHDJHDHB.html |
| * A72 ASIMD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0462f/CHDJHDHB.html | * A72 ASIMD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0462f/CHDJHDHB.html |
| | * A73 ASIMD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100048_0100_06_en/meg1411720673088.html |
| | * A75 ASIMD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100403_0301_00_en/lau1442504316638.html |
| | * A76 ASIMD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100798_0301_00_en/lau1442502550390.html |
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