cpu:atomic
差分
このページの2つのバージョン間の差分を表示します。
両方とも前のリビジョン前のリビジョン次のリビジョン | 前のリビジョン次のリビジョン両方とも次のリビジョン | ||
cpu:atomic [2019/07/07 00:04] – oga | cpu:atomic [2019/07/07 20:15] – [ARMv7A] oga | ||
---|---|---|---|
行 44: | 行 44: | ||
- | ==== ARMv8.2A ==== | + | ==== ARMv8.1A ==== |
<code asm> | <code asm> | ||
ldaddal w23, | ldaddal w23, | ||
</ | </ | ||
+ | |||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== fetch_and (seq_cst) ===== | ||
+ | |||
+ | ==== x64 ==== | ||
+ | |||
+ | <code asm> | ||
+ | ; linux clang | ||
+ | movl (%rsp), | ||
+ | movl %ecx, %edx | ||
+ | andl $4, %edx | ||
+ | movl %ecx, %eax | ||
+ | lock cmpxchgl %edx, | ||
+ | movl %eax, %ecx | ||
+ | </ | ||
+ | |||
+ | <code asm> | ||
+ | ; windows | ||
+ | prefetchw | ||
+ | mov | ||
+ | nop | ||
+ | mov | ||
+ | and | ||
+ | lock cmpxchg dword ptr [rbp-10h], | ||
+ | </ | ||
+ | |||
+ | |||
+ | ==== ARMv8.1A ==== | ||
+ | |||
+ | <code asm> | ||
+ | ldclral w21, | ||
+ | </ | ||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== fetch_or (seq_cst) ===== | ||
+ | |||
+ | ==== ARMv8.1A ==== | ||
+ | |||
+ | <code asm> | ||
+ | ldsetal w20, | ||
+ | </ | ||
+ | |||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== fetch_xor (seq_cst) ===== | ||
+ | |||
+ | ==== ARMv8.1A ==== | ||
+ | |||
+ | <code asm> | ||
+ | ldeoral w8, | ||
+ | </ | ||
+ | |||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== exchange (seq_cst) ===== | ||
+ | |||
+ | ==== x64 ==== | ||
+ | |||
+ | <code asm> | ||
+ | ; linux clang | ||
+ | xchgl %esi, | ||
+ | </ | ||
+ | |||
+ | <code asm> | ||
+ | ; windows | ||
+ | xchg edx,dword ptr [rbp-10h] | ||
+ | </ | ||
+ | |||
+ | ==== ARMv8.1A ==== | ||
+ | |||
+ | <code asm> | ||
+ | swpal w23, w1, [x19] | ||
+ | </ | ||
+ | |||
+ | |||
+ | |||
+ | |||
行 70: | 行 152: | ||
ldrex r2, [r4] | ldrex r2, [r4] | ||
cmp r2, #0 | cmp r2, #0 | ||
- | beq .LBB0_18 | + | beq .LBB0_44 |
clrex | clrex | ||
- | b .LBB0_19 | + | b .LBB0_45 |
- | .LBB0_18: | + | .LBB0_44: |
dmb ish | dmb ish | ||
mov r0, #3 | mov r0, #3 | ||
strex r1, r0, [r4] | strex r1, r0, [r4] | ||
cmp r1, #0 | cmp r1, #0 | ||
- | ~ | + | beq .LBB0_53 |
+ | .LBB0_45: | ||
</ | </ | ||
行 86: | 行 169: | ||
<code asm> | <code asm> | ||
- | stlr wzr, [x19] | ||
- | ldar w1, [x19] | ||
- | adrp x0, .L.str.11 | ||
- | add x0, x0, : | ||
- | bl printf | ||
ldaxr w2, [x19] | ldaxr w2, [x19] | ||
cbz w2, .LBB0_18 | cbz w2, .LBB0_18 | ||
行 103: | 行 181: | ||
- | ==== ARMv8.2A ==== | + | ==== ARMv8.1A ==== |
<code asm> | <code asm> | ||
行 129: | 行 207: | ||
<code asm> | <code asm> | ||
+ | .LBB0_47: | ||
ldrex r2, [r4] | ldrex r2, [r4] | ||
cmp r2, #3 | cmp r2, #3 | ||
- | bne .LBB0_24 | + | bne .LBB0_50 |
- | mov r0, #0 | + | |
- | dmb ish | + | |
- | .LBB0_22: | + | |
strex r1, r0, [r4] | strex r1, r0, [r4] | ||
cmp r1, #0 | cmp r1, #0 | ||
- | beq .LBB0_25 | + | bne .LBB0_47 |
- | ldrex r2, [r4] | + | dmb ish |
- | cmp r2, #3 | + | mov r1, #1 |
- | beq .LBB0_22 | + | b .LBB0_51 |
- | .LBB0_24: | + | .LBB0_50: |
clrex | clrex | ||
mov r1, #0 | mov r1, #0 | ||
dmb ish | dmb ish | ||
- | b .LBB0_26 | + | .LBB0_51: |
- | .LBB0_25: | + | |
- | dmb ish | + | |
- | mov r1, #1 | + | |
- | .LBB0_26: | + | |
</ | </ | ||
行 171: | 行 243: | ||
- | ==== ARMv8.2A ==== | + | ==== ARMv8.1A ==== |
<code asm> | <code asm> | ||
行 181: | 行 253: | ||
===== load ===== | ===== load ===== | ||
- | ==== ARMv8.xA (seq_cst/acquire) ==== | + | ==== ARMv7A (relaxed) ==== |
+ | |||
+ | <code asm> | ||
+ | ldr r0, [r4] | ||
+ | </ | ||
+ | |||
+ | ==== ARMv7A (acquire/ | ||
+ | |||
+ | <code asm> | ||
+ | ldr r0, [r4] | ||
+ | dmb ish | ||
+ | </ | ||
+ | |||
+ | |||
+ | ==== ARMv8.xA (relaxed) ==== | ||
+ | |||
+ | <code asm> | ||
+ | ldr w1, [x19] | ||
+ | </code> | ||
+ | |||
+ | |||
+ | ==== ARMv8.xA (acquire/ | ||
<code asm> | <code asm> | ||
ldar w1, [x19] | ldar w1, [x19] | ||
+ | </ | ||
+ | |||
+ | |||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== store ===== | ||
+ | |||
+ | ==== ARMv7A (relaxed) ==== | ||
+ | |||
+ | <code asm> | ||
+ | str r5, [r4] | ||
+ | </ | ||
+ | |||
+ | ==== ARMv7A (release) ==== | ||
+ | |||
+ | <code asm> | ||
+ | dmb ish | ||
+ | str r5, [r4] | ||
+ | </ | ||
+ | |||
+ | ==== ARMv7A (seq_cst) ==== | ||
+ | |||
+ | <code asm> | ||
+ | dmb ish | ||
+ | str r5, [r4] | ||
+ | dmb ish | ||
</ | </ | ||
行 191: | 行 311: | ||
<code asm> | <code asm> | ||
- | ldr w1, [sp, #8] | + | str w20, [x19] |
</ | </ | ||
+ | ==== ARMv8.xA (release/ | ||
+ | |||
+ | <code asm> | ||
+ | stlr w20, [x19] | ||
+ | </ | ||
cpu/atomic.txt · 最終更新: 2019/07/07 21:08 by oga